What You Will Learn

Prerequisites

How a Parent Index Becomes a Register Value

Whenever clk_set_parent() is called against a mux clock, the CCF has to
translate the requested parent index into whatever bit pattern that specific piece of
hardware actually expects in its selector register. The logic follows a clear
precedence order:

Whatever value comes out of that logic is then left-shifted by shift and
masked before being written into reg. In plain terms: an explicit
table always wins if one is provided; failing that,
CLK_MUX_INDEX_BIT and CLK_MUX_INDEX_ONE can adjust a
power-of-two or off-by-one encoding; and with nothing set at all, the index is used
directly as the register value.

Why clk_hw_register_mux() Cannot Pass a Table

Looking back at the previous lecture’s registration prototype, there is no parameter
anywhere for supplying a table array —
clk_hw_register_mux() only covers the sequential, power-of-two, and
off-by-one cases through its flags. For a genuinely irregular mapping, where register
values do not follow any of those three predictable patterns, the CCF provides a
separate registration interface instead:

struct clk *clk_register_mux_table(struct device *dev,
                                    const char *name,
                                    const char **parent_names,
                                    u8 num_parents,
                                    unsigned long flags,
                                    void __iomem *reg, u8 shift, u32 mask,
                                    u8 clk_mux_flags, u32 *table,
                                    spinlock_t *lock);

This is the same registration underneath — the same
clk_mux_ops/clk_mux_ro_ops are still used regardless of which
registration interface you called. The only difference is that this variant lets you
supply the table array directly, for hardware whose selector values simply
do not follow any formula.

Original Demo: A Mux With an Irregular Value Table

Some real clock-selector registers use scattered values for historical or
layout reasons — imagine a 3-input mux where the hardware designer wired parent 0
to register value 0x0, parent 1 to 0x2, and parent 2 to 0x5, with no arithmetic
relationship between the index and the value at all. A plain
clk_hw_register_mux() call has no flag that can express this; a table is
the only correct answer.

/* ep_mux_table_demo.c - three parents mapped to non-sequential register values */
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/io.h>
#include <linux/spinlock.h>

static const char * const ep_mux_table_parents[] = {
    "ep_bus_clk", "ep_ext_osc", "ep_derived_clk"
};

/* index 0 -> 0x0, index 1 -> 0x2, index 2 -> 0x5 (no arithmetic pattern) */
static u32 ep_mux_table[] = { 0x0, 0x2, 0x5 };

struct ep_mux_table_data {
    void __iomem *base;
    spinlock_t lock;
    struct clk *mux_clk;
};

static int ep_mux_table_probe(struct platform_device *pdev)
{
    struct device *dev = &pdev->dev;
    struct ep_mux_table_data *data;

    data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
    if (!data)
        return -ENOMEM;

    spin_lock_init(&data->lock);

    data->base = devm_platform_ioremap_resource(pdev, 0);
    if (IS_ERR(data->base))
        return PTR_ERR(data->base);

    data->mux_clk = clk_register_mux_table(dev, "ep_mux_table_out",
                                            ep_mux_table_parents,
                                            ARRAY_SIZE(ep_mux_table_parents),
                                            0, data->base, 0, 0x7,
                                            0, ep_mux_table, &data->lock);
    if (IS_ERR(data->mux_clk))
        return PTR_ERR(data->mux_clk);

    return devm_add_action_or_reset(dev, (void (*)(void *))clk_unregister,
                                     data->mux_clk);
}

static const struct of_device_id ep_mux_table_of_match[] = {
    { .compatible = "ep,clk-mux-table-demo" },
    { }
};
MODULE_DEVICE_TABLE(of, ep_mux_table_of_match);

static struct platform_driver ep_mux_table_driver = {
    .probe = ep_mux_table_probe,
    .driver = {
        .name = "ep_clk_mux_table_demo",
        .of_match_table = ep_mux_table_of_match,
    },
};
module_platform_driver(ep_mux_table_driver);

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("EmbeddedPathashala irregular mux table demo");

Notice the cleanup here uses devm_add_action_or_reset() paired with
clk_unregister(), since clk_register_mux_table() is a
struct clk *-returning legacy-style interface without its own managed
devm_ variant — a good reminder that not every CCF registration
function has a managed counterpart, and unmanaged ones still need explicit teardown
wiring.

Build and Run

make -C /lib/modules/$(uname -r)/build M=$(pwd) modules
sudo insmod ep_mux_table_demo.ko
cat /sys/kernel/debug/clk/clk_summary | grep ep_mux_table_out

Expected clk_summary excerpt, showing the mux registered and reporting whichever
parent’s rate its current register value maps back to:

ep_mux_table_out          1        1        0   100000000          0

Choosing Between the Two Mux Registration Variants

Common Mistakes

Best Practices

Summary and Key Takeaways

Frequently Asked Questions

Suggested Images For This Lecture